A chip resistor may be configured in the manner shown in FIGS. 5 and 6.
The chip resistor 1a includes an insulating substrate 2a in the form of a chip, on which a resistor film 3a and a cover coat 4a for covering the resistor film 3a are formed. At longitudinally opposite ends of the insulating substrate 2a, terminal electrode films 5a and 6a are formed to be electrically connected to the resistor film 3a. The terminal electrode films 5a and 6a are to be soldered on a printed circuit board 7.
With respect to such a structure, Patent Document 1 teaches that the soldering terminal electrode films 5a and 6a at opposite ends of the insulating substrate 2 are extended onto the lower surface side of the insulating substrate 2a, so that the solderability and soldering strength with respect to the printed circuit board 7 can be enhanced.
FIG. 7 shows a chip resistor 1b disclosed in Patent Document 2. In this chip resistor, while a resistor film 3b and a cover coat 4b for covering the resistor film 3b are formed on the insulating substrate 2b in the form of a chip, soldering terminal electrode films 5b and 6b at opposite ends of the insulating substrate 2b are extended onto the lower surface of the insulating substrate 2b. Further, an insulating projection 8b is provided on the lower surface of the insulating substrate 2b at a location between the terminal electrode films 5b and 6b. With this structure, the terminal electrode films 5b and 6b can be soldered while being spaced upward from the surface of the printed circuit board 7 by an appropriate distance S due to the existence of the projection 8b, so that the thermal expansion with respect to the printed circuit board 7 can be absorbed.
Patent Document 1: JP-A-H07-142203
Patent Document 2: JP-A-2000-30903